Business & Products New Business

SIC Business

  • 3C-SiC on Si Heteroepitaxial wafer
  • GaN on SiC/Si Template wafer
Substrate for GaN power devices / high emission LED
GaN on SiC/Si Template wafer

AWI has newly started to provide GaN on SiC/Si template wafer at the size of 2 to 6 inch since April in 2013.


  • 2 inch to 6 inch wafers are available
  • Lower crack density of GaN can be obtained
  • Good XRC values for GaN epi can be obtained
  • Available with GaN–HEMT active layer growth
  • Buried-SiO2 layer formation between SiC and Si interface are optionally available in terms of utilization for as assisted layer of high BD and light reflector.

GaN on SiC/Si Template wafer

General specification
Layer structure 2 μm GaN(0001) /1.5 μm Nitride buffer / 0.5 μm SiC(111) / Si-sub.
Si substrate thickness 900 μm
Warp/Bow ≤90 μm
GaN thickness (Top layer) 2.0±0.5 μm
XRC FWHM GaN(0004)≤700 arcsec
GaN(10-12)≤1000 arcsec
Crack ≤5 lines (@EE5 mm)

Schematic cross section

Plane SEM image

6" GaN on SiC/Si template wafer XRC-FWHM(SiC(111), ω-scan)

XRC-FWHM GaN (0004): 433 arcsec (Tilt)

XRC-FWHM GaN (10-12): 776 arcsec (Twist)